Comparing Wire Bond and Flip Chip Interconnects

Description

The purpose of this project was to design an interconnect consisting of a single trace route across three FR4 layers characterized for a quasi-PCI Express 7.0 serial data link. The PCle 7.0 signal is routed through the trace and analyzed under realistic conditions from the SIE standpoint in this report.  A flip chip combination was used to route the signal out of the chip.  All traces are copper. 

With the comparison of the flip chip to the bond wire designs we concluded that the original bond wire was the more optimized design with having more optimal frequencies and having less jitter as a higher data transfer rate.  The flip chip needed a lower data rate to pass the jitter test, but passed the receiver compliance test at the same data rate that the bond wire did. The optimal frequency for the flip chip is from 540MHz to 840MHz or 1.63GHz to 1.79GHz. The optimal frequency for the bond wire is from 0Hz to 810MHz or 1.54GHz to 1.82GHz. This means the only advantage that the flip chip has is over the 810MHz to 840MHz frequency range.

Project Report

325 Final Project Report

Media