Signaling and Cross-Talk
Description
The goal of this project was to build a multi-port transmission line topology in HFSS and analyze the effect of implementing differential signaling on the crosstalk and noise reduction in a quasi-PCI Express 7.0 serial data link. To investigate the differential signaling potential for crosstalk and noise reduction, a two layer segment of a motherboard was created to route three traces from a chipset on one edge of the segment to the other.
Differential signaling is important to high-speed data I/O architectures in which two lines transmit the same data. The data is transmitted on one line and the inverted copy is transmitted on another line. The data is recovered at the receiver end by forming a differential signal Vdiff which is simply a subtraction of the data on the second line from the data on the first line. If another line is placed evenly between the two lines both the induced and actual crosstalk on the line will be reduced.
